/* { dg-do compile } */
/* { dg-options "-O3 -march=rv32gc_zve32x_zvl64b -mabi=ilp32d" } */

#include "riscv_vector.h"

void f_vint8mf8x2_t () {vint8mf8x2_t t;}
void f_vuint8mf8x2_t () {vuint8mf8x2_t t;}
void f_vint8mf8x3_t () {vint8mf8x3_t t;}
void f_vuint8mf8x3_t () {vuint8mf8x3_t t;}
void f_vint8mf8x4_t () {vint8mf8x4_t t;}
void f_vuint8mf8x4_t () {vuint8mf8x4_t t;} 
void f_vint8mf8x5_t () {vint8mf8x5_t t;}
void f_vuint8mf8x5_t () {vuint8mf8x5_t t;}
void f_vint8mf8x6_t () {vint8mf8x6_t t;}
void f_vuint8mf8x6_t () {vuint8mf8x6_t t;}
void f_vint8mf8x7_t () {vint8mf8x7_t t;}
void f_vuint8mf8x7_t () {vuint8mf8x7_t t;}
void f_vint8mf8x8_t () {vint8mf8x8_t t;}
void f_vuint8mf8x8_t () {vuint8mf8x8_t t;}
void f_vint8mf4x2_t () {vint8mf4x2_t t;}
void f_vuint8mf4x2_t () {vuint8mf4x2_t t;}
void f_vint8mf4x3_t () {vint8mf4x3_t t;}
void f_vuint8mf4x3_t () {vuint8mf4x3_t t;}
void f_vint8mf4x4_t () {vint8mf4x4_t t;}
void f_vuint8mf4x4_t () {vuint8mf4x4_t t;}
void f_vint8mf4x5_t () {vint8mf4x5_t t;}
void f_vuint8mf4x5_t () {vuint8mf4x5_t t;}
void f_vint8mf4x6_t () {vint8mf4x6_t t;}
void f_vuint8mf4x6_t () {vuint8mf4x6_t t;}
void f_vint8mf4x7_t () {vint8mf4x7_t t;}
void f_vuint8mf4x7_t () {vuint8mf4x7_t t;}
void f_vint8mf4x8_t () {vint8mf4x8_t t;}
void f_vuint8mf4x8_t () {vuint8mf4x8_t t;}
void f_vint8mf2x2_t () {vint8mf2x2_t t;}
void f_vuint8mf2x2_t () {vuint8mf2x2_t t;}
void f_vint8mf2x3_t () {vint8mf2x3_t t;}
void f_vuint8mf2x3_t () {vuint8mf2x3_t t;}
void f_vint8mf2x4_t () {vint8mf2x4_t t;}
void f_vuint8mf2x4_t () {vuint8mf2x4_t t;}
void f_vint8mf2x5_t () {vint8mf2x5_t t;}
void f_vuint8mf2x5_t () {vuint8mf2x5_t t;}
void f_vint8mf2x6_t () {vint8mf2x6_t t;}
void f_vuint8mf2x6_t () {vuint8mf2x6_t t;}
void f_vint8mf2x7_t () {vint8mf2x7_t t;}
void f_vuint8mf2x7_t () {vuint8mf2x7_t t;}
void f_vint8mf2x8_t () {vint8mf2x8_t t;}
void f_vuint8mf2x8_t () {vuint8mf2x8_t t;}
void f_vint8m1x2_t () {vint8m1x2_t t;}
void f_vuint8m1x2_t () {vuint8m1x2_t t;}
void f_vint8m1x3_t () {vint8m1x3_t t;}
void f_vuint8m1x3_t () {vuint8m1x3_t t;}
void f_vint8m1x4_t () {vint8m1x4_t t;}
void f_vuint8m1x4_t () {vuint8m1x4_t t;}
void f_vint8m1x5_t () {vint8m1x5_t t;}
void f_vuint8m1x5_t () {vuint8m1x5_t t;}
void f_vint8m1x6_t () {vint8m1x6_t t;}
void f_vuint8m1x6_t () {vuint8m1x6_t t;}
void f_vint8m1x7_t () {vint8m1x7_t t;}
void f_vuint8m1x7_t () {vuint8m1x7_t t;}
void f_vint8m1x8_t () {vint8m1x8_t t;}
void f_vuint8m1x8_t () {vuint8m1x8_t t;}
void f_vint8m2x2_t () {vint8m2x2_t t;}
void f_vuint8m2x2_t () {vuint8m2x2_t t;}
void f_vint8m2x3_t () {vint8m2x3_t t;}
void f_vuint8m2x3_t () {vuint8m2x3_t t;}
void f_vint8m2x4_t () {vint8m2x4_t t;}
void f_vuint8m2x4_t () {vuint8m2x4_t t;}
void f_vint8m4x2_t () {vint8m4x2_t t;}
void f_vuint8m4x2_t () {vuint8m4x2_t t;}
void f_vint16mf4x2_t () {vint16mf4x2_t t;}
void f_vuint16mf4x2_t () {vuint16mf4x2_t t;}
void f_vint16mf4x3_t () {vint16mf4x3_t t;}
void f_vuint16mf4x3_t () {vuint16mf4x3_t t;}
void f_vint16mf4x4_t () {vint16mf4x4_t t;}
void f_vuint16mf4x4_t () {vuint16mf4x4_t t;}
void f_vint16mf4x5_t () {vint16mf4x5_t t;}
void f_vuint16mf4x5_t () {vuint16mf4x5_t t;}
void f_vint16mf4x6_t () {vint16mf4x6_t t;}
void f_vuint16mf4x6_t () {vuint16mf4x6_t t;}
void f_vint16mf4x7_t () {vint16mf4x7_t t;}
void f_vuint16mf4x7_t () {vuint16mf4x7_t t;}
void f_vint16mf4x8_t () {vint16mf4x8_t t;}
void f_vuint16mf4x8_t () {vuint16mf4x8_t t;}
void f_vint16mf2x2_t () {vint16mf2x2_t t;}
void f_vuint16mf2x2_t () {vuint16mf2x2_t t;}
void f_vint16mf2x3_t () {vint16mf2x3_t t;}
void f_vuint16mf2x3_t () {vuint16mf2x3_t t;}
void f_vint16mf2x4_t () {vint16mf2x4_t t;}
void f_vuint16mf2x4_t () {vuint16mf2x4_t t;}
void f_vint16mf2x5_t () {vint16mf2x5_t t;}
void f_vuint16mf2x5_t () {vuint16mf2x5_t t;}
void f_vint16mf2x6_t () {vint16mf2x6_t t;}
void f_vuint16mf2x6_t () {vuint16mf2x6_t t;}
void f_vint16mf2x7_t () {vint16mf2x7_t t;}
void f_vuint16mf2x7_t () {vuint16mf2x7_t t;}
void f_vint16mf2x8_t () {vint16mf2x8_t t;}
void f_vuint16mf2x8_t () {vuint16mf2x8_t t;}
void f_vint16m1x2_t () {vint16m1x2_t t;}
void f_vuint16m1x2_t () {vuint16m1x2_t t;}
void f_vint16m1x3_t () {vint16m1x3_t t;}
void f_vuint16m1x3_t () {vuint16m1x3_t t;}
void f_vint16m1x4_t () {vint16m1x4_t t;}
void f_vuint16m1x4_t () {vuint16m1x4_t t;}
void f_vint16m1x5_t () {vint16m1x5_t t;}
void f_vuint16m1x5_t () {vuint16m1x5_t t;}
void f_vint16m1x6_t () {vint16m1x6_t t;}
void f_vuint16m1x6_t () {vuint16m1x6_t t;}
void f_vint16m1x7_t () {vint16m1x7_t t;}
void f_vuint16m1x7_t () {vuint16m1x7_t t;}
void f_vint16m1x8_t () {vint16m1x8_t t;}
void f_vuint16m1x8_t () {vuint16m1x8_t t;}
void f_vint16m2x2_t () {vint16m2x2_t t;}
void f_vuint16m2x2_t () {vuint16m2x2_t t;}
void f_vint16m2x3_t () {vint16m2x3_t t;}
void f_vuint16m2x3_t () {vuint16m2x3_t t;}
void f_vint16m2x4_t () {vint16m2x4_t t;}
void f_vuint16m2x4_t () {vuint16m2x4_t t;}
void f_vint16m4x2_t () {vint16m4x2_t t;}
void f_vuint16m4x2_t () {vuint16m4x2_t t;}
void f_vint32mf2x2_t () {vint32mf2x2_t t;}
void f_vuint32mf2x2_t () {vuint32mf2x2_t t;}
void f_vint32mf2x3_t () {vint32mf2x3_t t;}
void f_vuint32mf2x3_t () {vuint32mf2x3_t t;}
void f_vint32mf2x4_t () {vint32mf2x4_t t;}
void f_vuint32mf2x4_t () {vuint32mf2x4_t t;}
void f_vint32mf2x5_t () {vint32mf2x5_t t;}
void f_vuint32mf2x5_t () {vuint32mf2x5_t t;}
void f_vint32mf2x6_t () {vint32mf2x6_t t;}
void f_vuint32mf2x6_t () {vuint32mf2x6_t t;}
void f_vint32mf2x7_t () {vint32mf2x7_t t;}
void f_vuint32mf2x7_t () {vuint32mf2x7_t t;}
void f_vint32mf2x8_t () {vint32mf2x8_t t;}
void f_vuint32mf2x8_t () {vuint32mf2x8_t t;}
void f_vint32m1x2_t () {vint32m1x2_t t;}
void f_vuint32m1x2_t () {vuint32m1x2_t t;}
void f_vint32m1x3_t () {vint32m1x3_t t;}
void f_vuint32m1x3_t () {vuint32m1x3_t t;}
void f_vint32m1x4_t () {vint32m1x4_t t;}
void f_vuint32m1x4_t () {vuint32m1x4_t t;}
void f_vint32m1x5_t () {vint32m1x5_t t;}
void f_vuint32m1x5_t () {vuint32m1x5_t t;}
void f_vint32m1x6_t () {vint32m1x6_t t;}
void f_vuint32m1x6_t () {vuint32m1x6_t t;}
void f_vint32m1x7_t () {vint32m1x7_t t;}
void f_vuint32m1x7_t () {vuint32m1x7_t t;}
void f_vint32m1x8_t () {vint32m1x8_t t;}
void f_vuint32m1x8_t () {vuint32m1x8_t t;}
void f_vint32m2x2_t () {vint32m2x2_t t;}
void f_vuint32m2x2_t () {vuint32m2x2_t t;}
void f_vint32m2x3_t () {vint32m2x3_t t;}
void f_vuint32m2x3_t () {vuint32m2x3_t t;}
void f_vint32m2x4_t () {vint32m2x4_t t;}
void f_vuint32m2x4_t () {vuint32m2x4_t t;}
void f_vint32m4x2_t () {vint32m4x2_t t;}
void f_vuint32m4x2_t () {vuint32m4x2_t t;}
void f_vint64m1x2_t () {vint64m1x2_t t;}
void f_vuint64m1x2_t () {vuint64m1x2_t t;}
void f_vint64m1x3_t () {vint64m1x3_t t;}
void f_vuint64m1x3_t () {vuint64m1x3_t t;}
void f_vint64m1x4_t () {vint64m1x4_t t;}
void f_vuint64m1x4_t () {vuint64m1x4_t t;}
void f_vint64m1x5_t () {vint64m1x5_t t;}
void f_vuint64m1x5_t () {vuint64m1x5_t t;}
void f_vint64m1x6_t () {vint64m1x6_t t;}
void f_vuint64m1x6_t () {vuint64m1x6_t t;}
void f_vint64m1x7_t () {vint64m1x7_t t;}
void f_vuint64m1x7_t () {vuint64m1x7_t t;}
void f_vint64m1x8_t () {vint64m1x8_t t;}
void f_vuint64m1x8_t () {vuint64m1x8_t t;}
void f_vint64m2x2_t () {vint64m2x2_t t;}
void f_vuint64m2x2_t () {vuint64m2x2_t t;}
void f_vint64m2x3_t () {vint64m2x3_t t;}
void f_vuint64m2x3_t () {vuint64m2x3_t t;}
void f_vint64m2x4_t () {vint64m2x4_t t;}
void f_vuint64m2x4_t () {vuint64m2x4_t t;}
void f_vint64m4x2_t () {vint64m4x2_t t;}
void f_vuint64m4x2_t () {vuint64m4x2_t t;}
void f_vfloat32mf2x2_t () {vfloat32mf2x2_t t;}
void f_vfloat32mf2x3_t () {vfloat32mf2x3_t t;}
void f_vfloat32mf2x4_t () {vfloat32mf2x4_t t;}
void f_vfloat32mf2x5_t () {vfloat32mf2x5_t t;}
void f_vfloat32mf2x6_t () {vfloat32mf2x6_t t;}
void f_vfloat32mf2x7_t () {vfloat32mf2x7_t t;}
void f_vfloat32mf2x8_t () {vfloat32mf2x8_t t;}
void f_vfloat32m1x2_t () {vfloat32m1x2_t t;}
void f_vfloat32m1x3_t () {vfloat32m1x3_t t;}
void f_vfloat32m1x4_t () {vfloat32m1x4_t t;}
void f_vfloat32m1x5_t () {vfloat32m1x5_t t;}
void f_vfloat32m1x6_t () {vfloat32m1x6_t t;}
void f_vfloat32m1x7_t () {vfloat32m1x7_t t;}
void f_vfloat32m1x8_t () {vfloat32m1x8_t t;}
void f_vfloat32m2x2_t () {vfloat32m2x2_t t;}
void f_vfloat32m2x3_t () {vfloat32m2x3_t t;}
void f_vfloat32m2x4_t () {vfloat32m2x4_t t;}
void f_vfloat32m4x2_t () {vfloat32m4x2_t t;}
void f_vfloat64m1x2_t () {vfloat64m1x2_t t;}
void f_vfloat64m1x3_t () {vfloat64m1x3_t t;}
void f_vfloat64m1x4_t () {vfloat64m1x4_t t;}
void f_vfloat64m1x5_t () {vfloat64m1x5_t t;}
void f_vfloat64m1x6_t () {vfloat64m1x6_t t;}
void f_vfloat64m1x7_t () {vfloat64m1x7_t t;}
void f_vfloat64m1x8_t () {vfloat64m1x8_t t;}
void f_vfloat64m2x2_t () {vfloat64m2x2_t t;}
void f_vfloat64m2x3_t () {vfloat64m2x3_t t;}
void f_vfloat64m2x4_t () {vfloat64m2x4_t t;}
void f_vfloat64m4x2_t () {vfloat64m4x2_t t;}

void new_f_vint64m1x2_t (vint64m1x2_t t) { }   /* { dg-error {argument type 'vint64m1x2_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x2_t (vuint64m1x2_t t) { } /* { dg-error {argument type 'vuint64m1x2_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m1x3_t (vint64m1x3_t t) { }   /* { dg-error {argument type 'vint64m1x3_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x3_t (vuint64m1x3_t t) { } /* { dg-error {argument type 'vuint64m1x3_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m1x4_t (vint64m1x4_t t) { }   /* { dg-error {argument type 'vint64m1x4_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x4_t (vuint64m1x4_t t) { } /* { dg-error {argument type 'vuint64m1x4_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m1x5_t (vint64m1x5_t t) { }   /* { dg-error {argument type 'vint64m1x5_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x5_t (vuint64m1x5_t t) { } /* { dg-error {argument type 'vuint64m1x5_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m1x6_t (vint64m1x6_t t) { }   /* { dg-error {argument type 'vint64m1x6_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x6_t (vuint64m1x6_t t) { } /* { dg-error {argument type 'vuint64m1x6_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m1x7_t (vint64m1x7_t t) { }   /* { dg-error {argument type 'vint64m1x7_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x7_t (vuint64m1x7_t t) { } /* { dg-error {argument type 'vuint64m1x7_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m1x8_t (vint64m1x8_t t) { }   /* { dg-error {argument type 'vint64m1x8_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m1x8_t (vuint64m1x8_t t) { } /* { dg-error {argument type 'vuint64m1x8_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m2x2_t (vint64m2x2_t t) { }   /* { dg-error {argument type 'vint64m2x2_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m2x2_t (vuint64m2x2_t t) { } /* { dg-error {argument type 'vuint64m2x2_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m2x3_t (vint64m2x3_t t) { }   /* { dg-error {argument type 'vint64m2x3_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m2x3_t (vuint64m2x3_t t) { } /* { dg-error {argument type 'vuint64m2x3_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m2x4_t (vint64m2x4_t t) { }   /* { dg-error {argument type 'vint64m2x4_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m2x4_t (vuint64m2x4_t t) { } /* { dg-error {argument type 'vuint64m2x4_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vint64m4x2_t (vint64m4x2_t t) { }   /* { dg-error {argument type 'vint64m4x2_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */
void new_f_vuint64m4x2_t (vuint64m4x2_t t) { } /* { dg-error {argument type 'vuint64m4x2_t' requires the zve64x, zve64f, zve64d or v ISA extension} } */

void new_f_vfloat32mf2x2_t (vfloat32mf2x2_t t) { } /* { dg-error {argument type 'vfloat32mf2x2_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32mf2x3_t (vfloat32mf2x3_t t) { } /* { dg-error {argument type 'vfloat32mf2x3_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32mf2x4_t (vfloat32mf2x4_t t) { } /* { dg-error {argument type 'vfloat32mf2x4_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32mf2x5_t (vfloat32mf2x5_t t) { } /* { dg-error {argument type 'vfloat32mf2x5_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32mf2x6_t (vfloat32mf2x6_t t) { } /* { dg-error {argument type 'vfloat32mf2x6_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32mf2x7_t (vfloat32mf2x7_t t) { } /* { dg-error {argument type 'vfloat32mf2x7_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32mf2x8_t (vfloat32mf2x8_t t) { } /* { dg-error {argument type 'vfloat32mf2x8_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */

void new_f_vfloat32m1x2_t (vfloat32m1x2_t t) { } /* { dg-error {argument type 'vfloat32m1x2_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m1x3_t (vfloat32m1x3_t t) { } /* { dg-error {argument type 'vfloat32m1x3_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m1x4_t (vfloat32m1x4_t t) { } /* { dg-error {argument type 'vfloat32m1x4_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m1x5_t (vfloat32m1x5_t t) { } /* { dg-error {argument type 'vfloat32m1x5_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m1x6_t (vfloat32m1x6_t t) { } /* { dg-error {argument type 'vfloat32m1x6_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m1x7_t (vfloat32m1x7_t t) { } /* { dg-error {argument type 'vfloat32m1x7_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m1x8_t (vfloat32m1x8_t t) { } /* { dg-error {argument type 'vfloat32m1x8_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m2x2_t (vfloat32m2x2_t t) { } /* { dg-error {argument type 'vfloat32m2x2_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m2x3_t (vfloat32m2x3_t t) { } /* { dg-error {argument type 'vfloat32m2x3_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m2x4_t (vfloat32m2x4_t t) { } /* { dg-error {argument type 'vfloat32m2x4_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat32m4x2_t (vfloat32m4x2_t t) { } /* { dg-error {argument type 'vfloat32m4x2_t' requires the zve32f, zve64f, zve64d or v ISA extension} } */
void new_f_vfloat64m1x2_t (vfloat64m1x2_t t) { } /* { dg-error {argument type 'vfloat64m1x2_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m1x3_t (vfloat64m1x3_t t) { } /* { dg-error {argument type 'vfloat64m1x3_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m1x4_t (vfloat64m1x4_t t) { } /* { dg-error {argument type 'vfloat64m1x4_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m1x5_t (vfloat64m1x5_t t) { } /* { dg-error {argument type 'vfloat64m1x5_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m1x6_t (vfloat64m1x6_t t) { } /* { dg-error {argument type 'vfloat64m1x6_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m1x7_t (vfloat64m1x7_t t) { } /* { dg-error {argument type 'vfloat64m1x7_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m1x8_t (vfloat64m1x8_t t) { } /* { dg-error {argument type 'vfloat64m1x8_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m2x2_t (vfloat64m2x2_t t) { } /* { dg-error {argument type 'vfloat64m2x2_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m2x3_t (vfloat64m2x3_t t) { } /* { dg-error {argument type 'vfloat64m2x3_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m2x4_t (vfloat64m2x4_t t) { } /* { dg-error {argument type 'vfloat64m2x4_t' requires the zve64d or v ISA extension} } */
void new_f_vfloat64m4x2_t (vfloat64m4x2_t t) { } /* { dg-error {argument type 'vfloat64m4x2_t' requires the zve64d or v ISA extension} } */
